As CMOS technique and solid image sensor technique are improved, CMOS image sensors have been developed quickly, and CMOS image sensing technique has substituted CCD sensing technique in low level image and video market. Compared to CCD image sensors, CMOS image sensors have advantages such as lower power consumption, wider dynamic range, higher video processing rate, higher integration level, and lower cost, etc., and are applicable to micro digital camera, portable visual telephone, and PC camera; in addition, CMOS image sensors can also be applied in military reconnaissance and satellites, etc.
Photoelectric coupling components can only sense light intensity but not color information. To sense color information, a color filter is required. Such a color filter is referred to as a Bayer color filter, which comprises a color array composed of RGB three primary colors aligned in a certain order, wherein, each pixel is covered with a filter in a specific color, which only allows the light in a specific color to penetrate and then is sensed and converted into electric signals by the photo diode. Then, the electric signals are output by column driver, sampled by the sampling circuit to obtain analog voltage signals, and sent to the analog signal processing circuit by row and column.
In order to facilitate back-end digital image processing, usually an A/D converter is arranged after the analog signal processing circuit to convert the analog image signals into digital signals. Such an A/D converter usually requires a sampling rate higher than 20 MHz, and therefore pertains to a high speed ADC and typically requires differential signal input. However, the signal VIN from the image pixel array are single-end signal, and they need to be converted into differential signal in order to match the ADC. In addition, in the processing in analog signal circuit, differential mode has significant advantages over single-end mode, wherein, one of the important advantages is the higher anti-interference capability against environment noise, and another advantage is increased voltage swing. Therefore, differential mode has become a main option for modern high-performance analog circuits and mixed signal circuits.
Due to the defects in CMOS processing, the characteristic parameters of transistors and the parameters of passive components are not homogeneous; therefore, Fixed Pattern Noise (FPN) exists in CMOS image sensors; FPN is intrinsic noise in CMOS image sensors and human eyes are particularly sensitive to such noise; therefore, FPN has particularly adverse effect to image quality of CMOS image sensors, and must be eliminated. Conventional image sensors employ a sampling circuit (referred to as Correlate Doubled Sampling (CDS) circuit) to eliminate FPN; however, such an approach can only eliminate the noise caused by non-homogeneity of the circuits previous to the sampling circuit but cannot eliminate the FPN noise caused by the difference among the components in the circuits after the sample circuit.
In order to ensure that the image from the CMOS image sensor can reflect the actual colors and brightness of the physical scene correctly, typically color gain adjustment and exposure adjustment must be applied in the analog signal processing circuit of the image sensor.
In the back-end digital image signal process (ISP), especially in the gamma correction process, usually the black level needs to be ascertained; if the black level is inappropriate, the contrast of the image after gamma correction will be affected severely; therefore, by adjusting the black level, better image quality can be attained after gamma calibration.
In the existing CMOS image sensor technique, four different color signals in the analog signal processing circuit usually employ four circuits or two circuit stages, respectively, to implement color gain control, exposure control, black level control, and FPN elimination; furthermore, FPN elimination is carried out in each column; therefore, the FPN elimination result depends on non-homogeneity of each column circuit, which is to say, FPN cannot be eliminated completely. Moreover, the processing circuit is simple in functionality but complex in structure, and thereby causes increased chip size. However, in present IC market with the fierce competition, reducing chip size and cost without degrading imaging quality has become a key factor in the survival of CMOS image sensor designers and manufacturers.
In order to solve above problem, a different architecture is put forward in the present invention, wherein, the pixel signals are separated into two streams by odd and even columns, and then processed by two symmetric analog signal processing circuits respectively, and combined to the same ADC for A/D conversion. Each analog signal processing circuit (Branch A or Branch B) processes pixel signals of two different colors. Thus, signals of different colors are processed through a switching capacitor circuit in the analog signal processing circuit structure under time sequence control, so as to implement different color gain control, exposure control, and black level control, and thereby the adjustment capability of the processing circuit is improved, the image noise is reduced, and the circuit structure is further simplified, the chip size and the cost are reduced. In the architecture provided in the present invention, CDS is carried out in each column, but its subtraction operation is identical to all odd and even columns, i.e., CDS subtraction operation is implemented for all odd and even columns in the corresponding analog signal processing circuit, and thereby the FPN is eliminated completely and thus independent to non-homogeneity of each column.